Semiconductor devices typically comprise one or more semiconductor chips designed for performing a desired function. The manufacture of semiconductor devices begins with the manufacture of the semiconductor chips. Semiconductor chips are first produced in a wafer form. The semiconductor chips are subsequently diced from the wafer into individual chips and then packaged. Individual chips, or multiple chips, may be packaged on a suitable substrate such as a multilayer ceramic (MLC), multichip module (MCM), for instance.
Multichip module substrates are known in the art and thus only briefly described herein. In addition, a substrate may also be referred to as a package, wherein the terms are used interchangeably herein below. MCM substrates typically comprise a number of layers of ceramic material, including metalizations, internal wiring networks, vias, and bond pads. Each layer is first formed of an unfired ceramic material, then punched and patterned according to a desired semiconductor chip package design. The layers are then assembled and aligned together in a predetermined order. The unfired ceramic material is then fired and flattened, as necessary. The MCM substrate thus produced is used for making chip-to-package interconnection to the one or more semiconductor chips for which it was designed. Upon positioning and attaching of the semiconductor chip onto the substrate, the chip can then be electrically connected thereto, as appropriate. Electrical interconnection between the MCM package and the semiconductor (s) can be made using wirebonding, flip-chip, thermally activated bonding, and/or other chip-to-package interconnect techniques known in the art. The substrate also includes input/output pins, or other suitable form of input/output connections, for interfacing the chip to a next level of packaging, for example, to a printed circuit board, or the like.
Of course, the functionality of any such module depends, in large part, on the functionality of the integrated circuit chips mounted thereon. The chip need not be defective, itself, to engender marginal functionality since effects such as parasitic capacitances and capacitive coupling of portions of the chip either to itself or other portions of the module when the chip is mounted thereon can alter propagation time through circuits on the chip. Random variation in such propagation times may make certain individual chips incompatible with other individual chips when installed in a particular module. For that reason, it is sometimes necessary to remove a chip from a module for replacement. It is also often necessary to remove a chip from a module to complete a diagnostic analysis of a module in which some aspect of functionality is questionable.
Therefore, it is not unusual for a particular chip or a plurality of chips to be removed from a module and either replaced or reinstalled a relatively large number of times during the manufacture of a module. Since the chips are generally attached to the module by solder connections (generally made by melting solder bumps, known as C4's, which are connection pads already on the chip to connection pads on the module by heating the entire assembly) which provide both electrical connections and mechanical support, removal of one or more or even all of the chips from a module is essentially a desoldering operation involving the application of heat, mechanical separation of the chip and module and removing molten solder from the joint. This process is costly and time-consuming and may subject the chip and/or the module to temperatures which can cause degradation of or damage to either or both.
One conventional technique for removing C4 mounted chips from a substrate is to apply heat in order to melt or reflow the solder balls. One of the problems with the heating technique of removing a chip from a substrate is that there is a limit on the number of times the solder balls can be reflowed. Furthermore, if there are a plurality of chips on the substrates, the application of heat generally reflows the solder balls on all of the chip sites. With both the dimensions of chips and the spaces between them decreasing, the chances of affecting a functioning chip increase with each generation of chips. Still further, substrates are generally bulky and thus require a heating process time on the order of thirty minutes or longer. In addition, tooling for rendering such a hot process removal is very expensive, effectively costing on the order of 100-200 thousand dollars or more. Yet still further, applying localized heat is ineffective for C4 counts or connections above a few hundred.
Thus, there remains a need for a method of removing individual chips that minimizes the chances of affecting or changing the functionality of any of the chips on the module.